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Instruction Level Parallelism - a historical perspective: Prof. Roland Ibbett, EPCC (70 mins, ~64 MB)
Manage episode 205984227 series 2307601
Content provided by Iain Bethune and Iain Bethune (ibethune@exseed.ed.ac.uk). All podcast content including episodes, graphics, and podcast descriptions are uploaded and provided directly by Iain Bethune and Iain Bethune (ibethune@exseed.ed.ac.uk) or their podcast platform partner. If you believe someone is using your copyrighted work without your permission, you can follow the process outlined here https://player.fm/legal.
This talk traces the development of the different types of instruction-level parallelism that have been incorporated into the hardware of processors from the early 1960s to the present day. We will see how the use of parallel function units in the CDC 6600 eventually led to the design of the Cray-1 with its vector processing instructions and superscalar processors such as the Alpha. The talk also covers Very Long Instruction Word systems and SIMD systems. The talk is accompanied by visual demonstrations of the activities that occur within processors using simulation models developed using the HASE computer architecture simulation environment.
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19 episodes
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Manage episode 205984227 series 2307601
Content provided by Iain Bethune and Iain Bethune (ibethune@exseed.ed.ac.uk). All podcast content including episodes, graphics, and podcast descriptions are uploaded and provided directly by Iain Bethune and Iain Bethune (ibethune@exseed.ed.ac.uk) or their podcast platform partner. If you believe someone is using your copyrighted work without your permission, you can follow the process outlined here https://player.fm/legal.
This talk traces the development of the different types of instruction-level parallelism that have been incorporated into the hardware of processors from the early 1960s to the present day. We will see how the use of parallel function units in the CDC 6600 eventually led to the design of the Cray-1 with its vector processing instructions and superscalar processors such as the Alpha. The talk also covers Very Long Instruction Word systems and SIMD systems. The talk is accompanied by visual demonstrations of the activities that occur within processors using simulation models developed using the HASE computer architecture simulation environment.
Links:
…
continue reading
Links:
- Slides - Talk slides
19 episodes
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continue reading
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continue reading
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…
continue reading
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